Senior ASIC Design Engineer - RTL / Verilog / SystemVerilog / SynthesisAre you a senior ASIC Design Engineer with 10+ years' industry experience?
Want to join a world semiconductor company focused on ASIC and FPGA design and verification, and embedded software in Canada?
We are partnered with an Ottawa HQ'd ASIC design house offering augmented design services and turnkey design teams within the semicon space.
They are looking for a number of Senior ASIC Design Engineers to join the team in Canada on a permanent basis.They can offer fully remote work from inside Canada and can even support relocation to Canada so international applicants are encouraged.
Please note - remote work from outside Canada is not availableSound good?What will you do?Interpret high-level requirements and transform them into meticulous specifications.
Design and execute RTL logic (predominantly Verilog or System Verilog), conduct block-level simulation, ASIC synthesis, DFT insertion, and ensure timing closure.
Collaborate closely with the verification team, design team, hardware team, and support team. Conduct lab bring-up, facilitate product integration, and provide support.
Deliver technical assistance to clients, guiding them through intricate technical challenges.What we look for in return is : Bachelor’s degree in electrical engineering or equivalent skills / experience.
10+ years of relevant experienceProficiency in modern ASIC development, encompassing RTL logic design, synthesis, STA, lint, LEC, and proficiency in PnR.
Expertise in handling complex asynchronous clock boundaries and high-speed serial interfaces. Familiarity with lab environments, adept at troubleshooting issues up to the system level.
Experience or familiarity with some of the following : Processor sub-systems (ARM, RISC-V), NOCs, GPUs, Display Interfaces, 10 / 25 / 40 / 100GbE, PCIe, AI Cores, Packet Processing, Routers / Switches.
Proficiency with industry-standard interfaces such as AHB, AXI, APB, AMBA, HDMI, DisplayPort, USB, Ethernet, PCIe, SPI, I2C, USB, GPIO, SRIO, DDR / SDRAM / DMA.
Any of the following will be considered a plus : Additional experience in test verification and scripting would be advantageous.
If this sounds interesting and you'd like to learn more, click the link below to apply or email me with a copy of your CV on smouland@eu-recruit.
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Senior ASIC Design Engineer - RTL / Verilog / SystemVerilog / Synthesis
Senior ASIC Design Engineer - RTL / Verilog / SystemVerilog / SynthesisAre you a senior ASIC Design Engineer with 10+ years' industry experience?Want to join a world semiconductor company focused on ASIC and FPGA design and verification, and embedded software in Canada?We are partnered with an Ottaw...
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