Staff ASIC Design Engineer

Infinera
Ottawa, Canada
$100K-$120K a year (estimated)
Full-time

Infinera is a global supplier of innovative, industry-leading connectivity solutions including high-end subcomponent technology, systems for network infrastructure, automation software and professional services.

We have 40+ years of experience and 1900+ patents powering carrier-class products and services worldwide. Our 500 customers have systems deployed in 100+ countries across six continents, including 9 of the top 10 tier 1 operators, and 7 of the top 9 internet content providers (ICPs).

We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine networks.

Our industry-leading, trendsetting edge-to-core solutions provide the foundation for many of the world’s largest and most demanding networks that generate billions of dollars in service revenue for our customers.

At Infinera, we envision a connected world with unlimited bandwidth for everyone everywhere, always and instantly. We believe developing great technology requires amazing people with the drive and passion to change the world, one innovation at a time.

If you are a highly motivated individual who embraces challenging and continuous learning opportunities, who finds satisfaction and purpose being responsible for making innovative contributions to the development of next-generation of DSP / FEC mixed-signal ASICs, and you want to help build industry-leading products for the optical networking market, we invite you to join our Ottawa ASIC design team.

Staff ASIC Design Engineer

Ottawa, Canada

Responsibilities

  • Work as part of a world class ASIC design team, building leading edge chips for the Coherent Optics market.
  • Subsystem development in large mixed signal optical coherent DSP ASICs
  • Work with system architect to define spec / micro-architecture and RTL development
  • Design size / timing / power optimization via micro-architecture / RTL / Synthesis
  • Layout support for quality final product and TTM

Requirements

  • B.Sc. in Elec / Computer Engineering is a must, higher degrees preferred
  • Minimum of 2-7 year ASIC design experience
  • Solid design (micro-architecture / implementation) and debugging skills
  • Working knowledge of DSP / FEC and communication theories
  • Strong problem solving skills
  • Good verbal / written communication skills and team work
  • Good knowledge of ASIC design flow / tools, with backend knowledge being a great asset

Assets

  • Working knowledge of MatLab and other scripting languages
  • Knowledge of OTN, CAUI and other telecom protocols
  • Design Experience with ethernet standards 100G to 800G would be an asset :

o100GE cl45,cl49, CL82,CL91,CL119

o200Ge ,400Ge cl161, cl116

o800ge 802.df / 800ETA

oPTP 1588 Standard

oEthernet frame types

oPacket insertion / extraction

LI-SR2

30+ days ago
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