Structural design engineer Jobs in Surrey, BC

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.

Visit our page to see what exciting opportunities and company await!

Job Description:

Microchip’s Data Center Solutions Business Unit (DCS) delivers industry leading performance, reliability, and security in Storage Controllers, Memory Controllers, NVMe SSD Controllers, PCIe Switches and SAS Expanders that are applied in Cloud Storage and Compute Data Centers, and Storage Area Networks.

As a System Validation Engineer, you will join a group of world class talented system integrators responsible for the bring-up, integration and validation of cutting-edge System on a Chip (SoC) products for the Data Center Solutions Business Unit.

Job Responsibilities

The responsibilities include but are not limited to:

• Integrating prototype SOC HW and FW into a complete solution. This includes working with emulation platforms, proto-ICs, validation boards, FW and SW to bring an entire system level solution to life and enable functional testing and FW development.

• Develop, execute, and document a series of feature tests that will fully validate the operation of the SoC and its various functional HW blocks and FW to ensure all components and the overall SoC is functioning per design specs, achieves expected performance and meets industry requirements and standards.

• Working with pre-silicon FGPA based emulation platforms and prototype (post-silicon) ICs/SOCs.

• Architecting, building and maintaining validation infrastructure through the development of boards, FPGAs, embedded software, device drivers and test bench scripts.

• Developing block, subsystem and system level test FW and scripts, and further integrating them in to best-in-class test automation suites.

• Leading small technical team activities in area of expertise.

• Architecting comprehensive test plans for area of expertise.

• Leading complex test execution and conducting investigations in a lab environment on-site and remotely.

• Finding and reporting bugs. Working with cross-expertise teams and leading efforts to isolate, investigate and solve them.

• Learning and dynamically applying knowledge of the device, system, protocols, and industry standards.

• Help grow and train the validation team.

• Effectively presenting technical information to internal and external groups.

The role and responsibilities will grow with the individual candidate’s skills and interests.

Requirements/Qualifications:

• Bachelor's or Master’s degree in Computer Engineering, Electrical Engineering or Computer Science.

• 10+ years of relevant industry experience. More junior applicants will be considered for other levels.

• Experience leading a small technical team.

• Experience in IC and SoC validation.

• Experience working with prototype ICs, boards and HW infrastructure.

• Experience working in a lab environment and knowledge of relevant test equipment and protocol analyzers.

• Experience in debug and investigation of SoC’s using FW and MIPS debug environment.

• Strong knowledge of digital system and computer architecture.

• Strong knowledge of Data Communication and Digital Design theory.

• Strong knowledge of scripting language such as Python or Tcl/Tk, proficiency in C/C++ programming.

• Demonstrated strong analytical and problem-solving skills.

• Experience in defining comprehensive test coverage at sub-block and system level, utilizing design specification, feature requirements and industry standards.

• Ability to develop and execute functional validation plans and necessary validation software and scripts.

• Knowledge of PCIe system architecture and protocol. Ability to read and analyze PCIe protocol traces.

• Experience in PCIe and/or DDR validation.

• Familiarity with CXL, DDR, I2C, SPI protocols is an asset.

• Experience testing and debugging high-speed SERDES.

• SoC performance validation and performance tuning experience is an asset.

• Hands-on hardware experience with x86 based systems.

• Experience working in Linux and Windows based OS environments.

• Thorough knowledge of circuit theory and high-speed signal fundamentals.

• Ability to quickly learn new technologies, protocols and standards.

• Comfortable working with developing specs and standards.

• Team player working well with peers and cross-functional groups.

• Strong communications and interpersonal skills.

Desired Qualification:

• Familiarity with FPGA based emulation environments - deployment of test coverage for pre-silicon test is an asset.

• Experience in high-speed digital designs, board designs, PCB layouts, signal integrity concepts and manufacturing process is an asset.

• Past experience developing and debugging MIPS based architecture. Programming FW in C/C++

• Working knowledge of protocols like: PCIe, CXL, DDR, NVMe, ONFI, SAS, SATA I2C, SPI and protocol trace debugging.

• In depth Linux OS architecture and driver knowledge.

• Linux or Windows host driver development.

• Knowledge of FPGA layout tools and VHDL/Verilog coding.

• Threadx or RTOS knowledge.

Travel Time:

0% - 25%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:The annual base salary range for this position is $86,000-$186,000.*

*Range is dependent on numerous factors including job location, skills and experience.

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