Senior Technical Staff Engineer - Analog Design

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.

Visit our page to see what exciting opportunities and company await!

Job Description:

The Timing and Communication Group (TCG) is seeking a highly seasoned Senior Technical Staff Engineer – Analog Design to provide technical leadership, architectural direction, across the development of advanced analog and mixed-signal IPs for next-generation timing solutions. This position goes beyond block-level design — it requires a strategic thinker with deep analog expertise, the ability to define system-level approaches, and a track record of mentoring and guiding high-performance design teams

Key Leadership & Technical Responsibilities

Architectural Ownership
• Define architecture, specifications, and design methodologies for high-performance analog IPs including PLLs, DLLs, ADCs, DACs, high-speed I/O interfaces, and other critical IPs used in TCG timing products.
• Drive top-level mixed-signal system architecture, ensuring robust integration of analog blocks within complex SoC environments.

Technical Leadership
• Provide senior-level guidance to the analog team; mentor junior and mid-level designers through design reviews, modeling strategy, simulation methodology, and silicon bring-up.
• Serve as a technical thought leader by influencing design tradeoffs, modeling strategies, and verification approaches across projects.

Hands-On Expertise
• Lead transistor-level design and advanced simulations for critical analog circuits across process corners and operating conditions.
• Develop behavioral and Verilog-A models that ensure fast, accurate representation of analog IPs within mixed-signal SoC simulations.
• Guide silicon validation, test planning, characterization, and system-level lab evaluation for new analog IP blocks.

Cross-Functional Collaboration
• Partner closely with architects, digital/mixed-signal teams, product engineers, layout teams, and multi-site groups to ensure cohesive, first-pass success of designs.
• Influence product roadmap and contribute to long-term analog IP strategy.

Requirements/Qualifications:

• Master’s degree or PhD in electrical engineering
• 10 + years of direct experience working on analog and mixed-signal circuits.
• High-speed and analog circuit design experience including the following: ADCs, DACs, Filters, PLLs, DLLs, and high-speed I/Os.
• Strong fundamentals in device physics, circuit theory, and layout-aware design
• Hands-on experience in scripting and automation using skill language, python, Perl and tcl
• Strong knowledge in Cadence IC design flow and tools
• Expertise in the system design of mixed signal circuits is preferred
• Strong knowledgeable in Verilog-A for analog behavioral modeling and simulation
• Good communication, teamwork skills and experience working with multi-site teams
• Experience with MEMS analog interface circuits is an asset

Travel Time:

0% - 25%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:The annual base salary range for this position is 153,000 - 203,000.*

*Range is dependent on numerous factors including job location, skills and experience.

Ontario Accommodation:

Your accessibility is important to us. If you would like to contact us about our website or need help completing the application process, please email us at .

In accordance with applicable laws (including human rights and accessibility legislation in Ontario), accommodation will be provided in all parts of the hiring process. Let us know what type of accommodations you require to help remove barriers so that you can participate throughout the interview process.

This contact information is for accommodation requests only and cannot be used to inquire about the status of applications.

To all recruitment agencies: