Technical Staff Engineer - Design

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.

Visit our page to see what exciting opportunities and company await!

Job Description:

Microchip’s Data Center Solutions Business Unit (DCS) offers industry leading performance, reliability, and security for PCIe Switches, and NVME Controllers. As a Senior Manager – Design Engineering, you will provide leadership in the highly successful PCIe Switch product line. These complex 200M gate+ integrated silicon devices enable top tier data centers in next gen storage, artificial intelligence and automotive market segments.

As a Technical Staff Engineer – Design, your job will entail the following:

• Ownership of complex digital integrated circuits at the block, subsystem or device level, which are coded in Verilog, System Verilog

• Translate complex architectural requirements into microarchitecture that is realizable in targeted technology node

• Lead and mentor design engineers, scope and schedule deliverables

• Define subsystem/block feature sets, describe design and implementation details into engineering documents and registers documents

• Communicate regularly with the design and verification team in multiple locations to resolve issues, communicate status and solve technical problems

• Communicate with executive to justify design implementation decisions and associated trade-offs

• Support emulation, ASIC lab validation including lab debug and providing logic modifications and workarounds

• Become versed in applicable storage and computer interface protocol standards

Requirements/Qualifications:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or equivalent

• 12+ years related experience

• RTL Design - Experience in RTL design using System Verilog, Verilog is required.

• Experience and understanding of complex ASIC design flows, including block and chip level simulation and debug, logic synthesis, static timing analysis, layout and revision control

• Scripting and programming skills using csh, bash, perl, python, tcl, etc.

• Excellent analytical and debugging skills and the ability to proactively solve issues

• Experience with integration of 3rd party IP.

• Experience with integration of high-speed, mixed signal IP

• Working knowledge of design and verification tools such as Synopsys Design Compiler, Cadence Incisive, waveform viewers, and other similar tools.

• Protocol knowledge and experience in PCI-Express will be an asset

• Knowledge of AHB/AXI bus protocols is desired.

• Excellent knowledge in logic synthesis and static timing analysis.

• Worked with physical design teams for layout implementation.

• Familiar with low power methodology and flows.

• Capable of debugging EDA tool issues or design related issues.

• Working knowledge of DFT.

• Experience with Formal Verification a plus.

• Good verbal and written communication skills in English will be an asset

• Excellent teamwork and time management skills, self-direction, the ability to work under pressure and the desire to excel in a competitive environment

Travel Time:

0% - 25%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:The annual base salary range for this position is $107,000 - $226,000..*

*Range is dependent on numerous factors including job location, skills and experience.

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