Physical Design IR/EM Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world.

Our mission is to build great products that accelerate next-generation computing experiences the building blocks for the data center, artificial intelligence, PCs, gaming and embedded.

Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges.

We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance THE ROLE : AMD is looking for an IR / EM Lead to deliver the next generation of cutting-edge SOCs.

THE PERSON : You have a passion for modern Digital SOC Design, and IR / EM in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and time zones.

You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Lead and execute IR / EM activities for one or more SOCs.

Define overall IR / EM methodology and plan for an SOC, including for Static and Dynamic IR, DC and signal-EM, current in-rush analysis.

Drive IR / EM convergence including Simulation, Analysis, Debug, and Design ECOs (Engineering Change Orders). Collaborate closely with the Physical Design Team and Block Owners throughout the project to ensure IR / EM convergence.

Research, design, and develop new IR / EM convergence methods. PREFERRED EXPERIENCE : Proven track record in leading and executing IR / EM activities for complex SOCs.

Experience with IR / EM analysis tools and and an in-depth understanding of the physical design of digital SOCs. Understanding of electrical circuit analysis, including power grid RC analysis.

Knowledge of power grid design and optimization to meet IR / EM requirements with minimal impact on logic density. Proficient scripting skills in languages such as Tcl, Perl, and Python.

Familiarity with Package / Substrate technology development, including exposure to the latest industry trends in 3D packaging or product architecture.

Strong technical problem-solving, communication, and presentation skills. Experience with various PNR tools, including Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, and Apache Redhawk.

Experience in Low power and high-performance design. ACADEMIC CREDENTIALS : Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.

LI-IA1 #LI-Hybrid Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

THE ROLE : AMD is looking for an IR / EM Lead to deliver the next generation of cutting-edge SOCs. THE PERSON : You have a passion for modern Digital SOC Design, and IR / EM in general.

You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites and time zones.

You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Lead and execute IR / EM activities for one or more SOCs.

Define overall IR / EM methodology and plan for an SOC, including for Static and Dynamic IR, DC and signal-EM, current in-rush analysis.

Drive IR / EM convergence including Simulation, Analysis, Debug, and Design ECOs (Engineering Change Orders). Collaborate closely with the Physical Design Team and Block Owners throughout the project to ensure IR / EM convergence.

Research, design, and develop new IR / EM convergence methods. PREFERRED EXPERIENCE : Proven track record in leading and executing IR / EM activities for complex SOCs.

Experience with IR / EM analysis tools and and an in-depth understanding of the physical design of digital SOCs. Understanding of electrical circuit analysis, including power grid RC analysis.

Knowledge of power grid design and optimization to meet IR / EM requirements with minimal impact on logic density. Proficient scripting skills in languages such as Tcl, Perl, and Python.

Familiarity with Package / Substrate technology development, including exposure to the latest industry trends in 3D packaging or product architecture.

Strong technical problem-solving, communication, and presentation skills. Experience with various PNR tools, including Synopsys ICC2, ICC, Design Compiler, PrimeTime, StarRC, Mentor Graphics Calibre, and Apache Redhawk.

Experience in Low power and high-performance design. ACADEMIC CREDENTIALS : Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.

LI-IA1 #LI-HybridBenefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.

AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.

We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.