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Design • westmount qc
- Promoted
Hardware Design Engineer
Insight GlobalAhuntsic North, ca- Promoted
Material Design Co-op : 5G Hardware & Mechanical Design
Ericsson GmbHAhuntsic North, ca- Promoted
ASIC DESIGN ENGINEER
High Tech GenesisAhuntsic North, caElectrical Design Engineer
Sécheron Hasler GroupMontreal, QC, CanadaBilingual Design Consultant
EQ3Laval, QC, CanadaMechanical Design Technician
VentionMontreal, Quebec, Canada- Promoted
Physical Design Engineer
Renesas ElectronicsAhuntsic North, ca- Promoted
Hardware Design Engineer
Global Talent Alliance, CanadaAhuntsic North, ca- Promoted
Hardware Design Engineer
Work in OttawaAhuntsic North, ca- Promoted
Hardware Design Engineer
AttoTude inc.Ahuntsic North, caDesign Project Coordinator (Architecture / Design – Retail Construction)
SAJOMont-Royal, Québec, Canada- Promoted
Design Verification Engineer
Advanced Micro DevicesAhuntsic North, ca- Promoted
ASIC DESIGN ENGINEER
High Tech Genesis Inc.Ahuntsic North, ca- Promoted
Physical Design Engineer
Technical-Link N. AmericaAhuntsic North, ca- Promoted
ASIC Design Engineer
Myticas ConsultingAhuntsic North, ca- Promoted
Material Design Coop
EricssonAhuntsic North, caDesign Engineer
HaysMontréalRailway design engineer
AtkinsRéalisMontreal, Quebec, Canada- Huntsville, ON (from $ 44,172 to $ 186,297 year)
- Shawinigan, QC (from $ 151,277 to $ 158,694 year)
- Welland, ON (from $ 51,513 to $ 156,000 year)
- Brockville, ON (from $ 38,863 to $ 155,698 year)
- Mirabel, QC (from $ 72,500 to $ 154,752 year)
- Dorval, QC (from $ 62,500 to $ 152,649 year)
- Pickering, ON (from $ 67,500 to $ 151,125 year)
- Salmon Arm, BC (from $ 75,669 to $ 149,982 year)
- Markham, ON (from $ 60,000 to $ 145,943 year)
- Ottawa, ON (from $ 72,369 to $ 144,958 year)
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Hardware Design Engineer
Insight GlobalAhuntsic North, ca- Full-time
We’re partnering with a leading telecom engineering organization seeking an experienced
Hardware Senior Principal Consultant
to drive next‑generation
4G / 5G Radio Unit FPGA design . This is a hands-on, high-impact role where you’ll influence architecture, guide technical direction, and own the end‑to‑end RTL lifecycle.
What You’ll Do
Lead FPGA IP architecture
for advanced 4G / 5G Radio Units
Develop and integrate RTL (SystemVerilog / Verilog)
into complex systems
Ensure FPGA
resource optimization
and
timing closure
across designs
Create and execute UVM-based verification plans , simulations, and system-level validation
Partner closely with
Radio Unit, software, and system engineering teams
to ensure seamless integration
Support
3GPP and O‑RAN–aligned system design decisions
Mentor junior engineers and contribute to
technical reviews & long‑range product planning
Provide technical input into
product evaluations
and roadmap assessments
Requirements
Strong FPGA / RTL background
— heavy SystemVerilog experience (no VHDL used)
Hands-on experience with
NR, LTE, eCPRI, CPRI, PTP , and related telecom protocols
AXI + Ethernet expertise
is highly important
Familiarity with
JESD204B / C ,
PCIe ,
SERDES , and other high‑speed interfaces
Proficiency with tools such as
Quartus (Altera) ,
Vivado ,
MATLAB / Simulink ,
HDL Coder
Strong understanding of
4G / 5G Radio architecture
and
O‑RAN requirements
Comfortable working in Git‑based environments ( Git / GitHub )
Compensation
$50 / hr to $64 / hr
Exact compensation may vary based on several factors, including skills, experience, and education.
Benefit packages for this role will start on the 31st day of employment and include medical, dental, and vision insurance, as well as short-term and long-term disability, life insurance and AD&D. Employees will also have access to a registered retirement savings account with employer matching. Employees in this role are also entitled to sick leave and / or other paid time off as provided by applicable law.
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