Senior Engineer I - Packaging

Senior Engineer I - Packaging page is loaded## Senior Engineer I - Packaginglocations : Canada - Burnabytime type : Full timeposted on : Posted Todayjob requisition id : R487-26People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the

• Aggregate System
• and it’s won us countless awards for diversity and workplace excellence.Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.Visit our page to see what exciting opportunities and company await!
• Job Description :
• This position for an Intermediate Package Development Engineer who will oversee and manage all aspects of IC package development from initial design and performance considerations, to package design optimization, determining design rules for manufacturing, selecting and interfacing with suitable technology and manufacturing partners and completing package qualification, cooperate with internal business unit designers, operations teams, and reliability resources, and final release products to production.The primary business unit requires packaging in flip chip BGA packaging using Cu Pillar Bump, high-density build-up substrates, multi-chip modules, system-in-package, and other leading-edge advanced packaging solutions.Responsibilities include the following : Work with the designated business units and co-design package solutions that meet the performance, thermal, and reliability requirements for the designated application space.Identify suitable IC package options and perform feasibility studies for all NPI (new product introduction), provide direct interface with multiple third-party assembly sites as well as internal design groups, product engineering, and product marketing and act as the available expert resource for packaging-related aspects of the product.Ensure early success in package development with substantial modeling and simulation for thermal, mechanical and electrical aspects. In addition, act as the thermal and mechanical expert resource for product validation and application teams and end customers for support on system-level solutions.Oversee evaluation and development of new packaging materials and processesManage qualifications of new packages or package changes to ensure quality and mitigate riskAuthor corporate and supplier-level presentations outlining package roadmaps and package technologiesAuthor and maintain design rules documents and application notes on package-specific topicsDraft preliminary package outline drawings for internal product development teamsInitiate and follow up on assembly build instructions for all engineering buildsAssist with global cost reduction, standardization and new system implementation projects
• Requirements / Qualifications :
• BSME, BSEE or BS in Chemical Engineering plus 5 years of experienceExperience with advanced laminate (BGA) and QFN package design and assemblyWell-developed knowledge of thermal & electrical simulations, ideally Siemens Flotherm or Ansys Workbench and related toolsExperience with thermal design considerations, including heat sink design and selectionSuperior communication and presentation skills and the ability to lead a small team as needed including mentoring junior engineersAbility to problem-solve and assist the reliability group on FA’s on assembly related failuresKnowledge of JEDEC qualification methods for advanced BGA and high-power IC'sAbility to carry out multiple projects simultaneously, set timelines and prioritize projectsAbility to author and comprehend engineering drawingsFamiliarity with ANSI Y-14 drafting nomenclatureTravel to Asia occasionally to attend technology reviews and resolve subcon issuesCompetence in working with multiple databases, technical acronyms and complex data sets
• Beneficial Skills
• Package Design using Cadence APDHigh frequency / SI analysis knowledge
• Travel Time :
• 0% - 25%
• Pay Range :
• We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below : The annual base salary range for this position is $86,000- $186,000.\
• Range is dependent on numerous factors including job location, skills and experience.
• To all recruitment agencies
• Microchip Technology Inc.
• does not
• accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
• At Microchip, employees are our greatest strength. As one of the top performing semiconductor companies in the world, we are led by a set of guiding values and a mission to empower innovation to enhance the human experience. We work tirelessly to create a company culture that highlights how important every employee is to our mission.

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