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Principal Engineer - Validation
Principal Engineer - ValidationMicrochip Technology Inc. • Burnaby, Metro Vancouver Regional District, CA
Principal Engineer - Validation

Principal Engineer - Validation

Microchip Technology Inc. • Burnaby, Metro Vancouver Regional District, CA
1 day ago
Job type
  • Full-time
Job description

Are you looking for a unique opportunity to be part of something great? Join a 17,000-member team that works on technology powering the world around us. Microchip Technology Inc. offers an atmosphere of trust, empowerment, respect, diversity, and communication, with opportunities to own a piece of a multi-billion dollar global organization.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports growth and stability. Our products and solutions provide unlimited career potential, and Microchip Leadership Passage Programs support career growth. We proudly enroll over a thousand people annually. We focus on employee development, values-based decision making, and a strong sense of community, guided by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System, which has earned awards for diversity and workplace excellence.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description

Microchip’s Data Center Solutions Business Unit (DCS) delivers industry-leading performance, reliability, and security in Storage Controllers, Memory Controllers, NVMe SSD Controllers, PCIe Switches, and SAS Expanders for Cloud Storage and Compute Data Centers and Storage Area Networks.

As a System Validation Engineer, you will join a group of world-class, talented system integrators responsible for the bring-up, integration, and validation of cutting-edge System on a Chip (SoC) products for the Data Center Solutions Business Unit.

Responsibilities

  • Integrating prototype SOC HW and FW into a complete solution. This includes working with emulation platforms, proto-ICs, validation boards, FW and SW to bring an entire system-level solution to life and enable functional testing and FW development.
  • Develop, execute, and document a series of feature tests that fully validate the operation of the SoC and its various functional HW blocks and FW to ensure all components and the overall SoC function per design specs, achieve expected performance, and meet industry requirements and standards.
  • Work with pre-silicon FPGA-based emulation platforms and prototype (post-silicon) ICs / SOCs.
  • Architect, build, and maintain validation infrastructure through the development of boards, FPGAs, embedded software, device drivers, and test bench scripts.
  • Develop block, subsystem, and system-level test FW and scripts, and integrate them into best-in-class test automation suites.
  • Lead small technical team activities in area of expertise.
  • Architect comprehensive test plans for area of expertise.
  • Lead complex test execution and conduct investigations in a lab environment on-site and remotely.
  • Find and report bugs. Work with cross-expertise teams and lead efforts to isolate, investigate, and solve them.
  • Learn and dynamically apply knowledge of the device, system, protocols, and industry standards.
  • Help grow and train the validation team.
  • Effectively present technical information to internal and external groups.

The role and responsibilities will grow with the individual candidate’s skills and interests.

Requirements / Qualifications

  • Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science.
  • 10+ years of relevant industry experience. More junior applicants will be considered for other levels.
  • Experience leading a small technical team.
  • Experience in IC and SoC validation.
  • Experience working with prototype ICs, boards, and HW infrastructure.
  • Experience working in a lab environment and knowledge of relevant test equipment and protocol analyzers.
  • Experience in debug and investigation of SoC’s using FW and MIPS debug environment.
  • Strong knowledge of digital systems and computer architecture.
  • Strong knowledge of Data Communication and Digital Design theory.
  • Strong knowledge of scripting languages such as Python or Tcl / Tk; proficiency in C / C++ programming.
  • Demonstrated strong analytical and problem-solving skills.
  • Experience in defining comprehensive test coverage at sub-block and system level, utilizing design specifications, feature requirements, and industry standards.
  • Ability to develop and execute functional validation plans and necessary validation software and scripts.
  • Knowledge of PCIe system architecture and protocol. Ability to read and analyze PCIe protocol traces.
  • Experience in PCIe and / or DDR validation.
  • Familiarity with CXL, DDR, I2C, SPI protocols is an asset.
  • Experience testing and debugging high-speed SERDES.
  • SoC performance validation and performance tuning experience is an asset.
  • Hands-on hardware experience with x86-based systems.
  • Experience working in Linux and Windows-based OS environments.
  • Thorough knowledge of circuit theory and high-speed signal fundamentals.
  • Ability to quickly learn new technologies, protocols, and standards.
  • Comfortable working with developing specs and standards.
  • Team player working well with peers and cross-functional groups.
  • Strong communications and interpersonal skills.
  • Desired Qualifications

  • Familiarity with FPGA-based emulation environments – deployment of test coverage for pre-silicon test is an asset.
  • Experience in high-speed digital designs, board designs, PCB layouts, signal integrity concepts and manufacturing process is an asset.
  • Past experience developing and debugging MIPS-based architecture. Programming FW in C / C++.
  • Working knowledge of protocols like PCIe, CXL, DDR, NVMe, ONFI, SAS, SATA, I2C, SPI and protocol trace debugging.
  • In-depth Linux OS architecture and driver knowledge.
  • Linux or Windows host driver development.
  • Knowledge of FPGA layout tools and VHDL / Verilog coding.
  • Threadx or RTOS knowledge.
  • Travel Time

    0% - 25%

    Pay Range

    We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry-leading IESPP program with a 6-month look-back feature. Find more information about all our benefits at the link below :

    Benefits of working at Microchip

    The annual base salary range for this position is $86,000-$186,000.

  • Range is dependent on numerous factors including job location, skills and experience.
  • To all recruitment agencies : Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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    Principal Engineer Validation • Burnaby, Metro Vancouver Regional District, CA

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