ASIC Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.Together, we advance your career.

THE ROLE:

We are seeking a highly motivated ASIC Design Engineer to join our PCIe IP Enablement team. In this role, you will contribute to the design and development of cutting-edge PCIe solutions, focusing on architecture, IP design, RTL implementation, and front-to-back design flows. You will collaborate closely with cross-functional teams to ensure high-quality, power-efficient, and performance-optimized designs.

THE PERSON:

• Exhibits relentless commitment to help the team meet quality and development goals on schedule
• Drives to learn and perform at his or her highest potential in a technical capacity
• Thrives in both a team environment and in individual contribution
• Communicates openly and clearly in meetings, presentations, emails, and reports
• Able to learn independently and acquire new skills required for the job
• Flexible in working hours to accommodate working with co-workers in different time-zones
• Creative and innovator and thinker who loves technical problems and detail-oriented tasks

KEY RESPONSIBILITIES:

• ASIC Design & DevelopmentDefine and implement architecture and IP design for PCIe subsystem components.Develop and maintain RTL code for complex digital blocks.Execute front-end and back-end flows, including:LINT, CDC checksSynthesis and LECStatic Timing Analysis (STA)ECO implementation and closure
• Low Power DesignApply advanced low-power design techniques and methodologies to meet stringent power targets.
• Feature ImplementationSupport integration of new features and enhancements in PCIe subsystem
• Cross-Team CollaborationWork with verification, physical design, and architecture teams to ensure seamless design handoff and sign-off.

PREFERRED EXPERIENCE:

• 10+ years experience in ASIC RTL design.
• Solid understanding of low-power design methodologies.
• Familiarity with PCIe protocol and subsystem architecture (a strong plus).
• Proficiency in EDA tools for synthesis, STA, and formal verification.
• Excellent problem-solving and debugging skills.

ACADEMIC CREDENTIALS:

B.S or M.S. Degree in electrical engineering or equivalent preferred

LOCATION:

Markham, Ontario; Vancouver, British Columbia

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

We are seeking a highly motivated ASIC Design Engineer to join our PCIe IP Enablement team. In this role, you will contribute to the design and development of cutting-edge PCIe solutions, focusing on architecture, IP design, RTL implementation, and front-to-back design flows. You will collaborate closely with cross-functional teams to ensure high-quality, power-efficient, and performance-optimized designs.

THE PERSON:

• Exhibits relentless commitment to help the team meet quality and development goals on schedule
• Drives to learn and perform at his or her highest potential in a technical capacity
• Thrives in both a team environment and in individual contribution
• Communicates openly and clearly in meetings, presentations, emails, and reports
• Able to learn independently and acquire new skills required for the job
• Flexible in working hours to accommodate working with co-workers in different time-zones
• Creative and innovator and thinker who loves technical problems and detail-oriented tasks

KEY RESPONSIBILITIES:

• ASIC Design & DevelopmentDefine and implement architecture and IP design for PCIe subsystem components.Develop and maintain RTL code for complex digital blocks.Execute front-end and back-end flows, including:LINT, CDC checksSynthesis and LECStatic Timing Analysis (STA)ECO implementation and closure
• Low Power DesignApply advanced low-power design techniques and methodologies to meet stringent power targets.
• Feature ImplementationSupport integration of new features and enhancements in PCIe subsystem
• Cross-Team CollaborationWork with verification, physical design, and architecture teams to ensure seamless design handoff and sign-off.

PREFERRED EXPERIENCE:

• 10+ years experience in ASIC RTL design.
• Solid understanding of low-power design methodologies.
• Familiarity with PCIe protocol and subsystem architecture (a strong plus).
• Proficiency in EDA tools for synthesis, STA, and formal verification.
• Excellent problem-solving and debugging skills.

ACADEMIC CREDENTIALS:

B.S or M.S. Degree in electrical engineering or equivalent preferred

LOCATION:

Markham, Ontario; Vancouver, British Columbia

#LI-DD3

#LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.