Design Verification Engineer
Job Title : Lead Design Verification Engineer (4 openings)Duration : FulltimeLocation : Vancouver, British Columbia, Canada (Onsite only)Experience : 8 to 15 years
Job Description : Experience in SOC level verification.Experience in PCie or Nvme.Experience with SV-UVM methodology.Experience on developing testbench and all TB components.
Experience on high-speed interface : PCIe, USB.System-on-a-chip verification with multiple CPUs and fixed function units with AXI or NOC interconnects.
RISC-V Design Verification Engineer (Intermediate-Staff)
Identify and resolve engineering issues ranging from functional verification, code coverage, Formal proofs, verification reports. Andes is a rapidly growing organization, and you will work with a team of experienced architects, designers and DV engineers for building next-generation of RISC-V CPUs. ...
PCIe Design Verification Engineer
AMD together we advance_ THE ROLE: AMD is looking for an experienced Design Verification Engineer willing to take on the challenge of verifying a part of the PCIe Controller Design. KEY RESPONSIBILITIES: Work with high-speed, low power digital circuit designs from definition to implementation Verifi...
Foundry Services, Design Verification Engineer
Bachelor's degree in degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study and 1+ years' experience OR Masters degree in electrical engineering, computer engineering, computer science, or other relevant STEM related field of study. Th...
Design Verification Engineer
Role: Design Verification Engineer System Verilog Key Responsibilities: Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. Conduct full-chip and SoC simulations to validate design functionality and performance. Demonstrate expertise i...
Design Verification Engineer
This is a senior role in which the Verification Engineer will be responsible for hands-on verification regression management and debugging, functional verification, code coverage, Formal proofs, and verification reports, and will guide more junior members of the Verification team. Based in Vancouver...
Design Verification Engineer
Interested about transforming the world? THE PERSON: Creative innovator and thinker who loves technical problems and detail-oriented tasks Exhibits relentless commitment to help the team meet quality and development goals on schedule Drives to learn and perform at his or her highest potential in a t...
Design Verification Engineer
This is a senior role in which the Verification Engineer will be responsible for hands-on verification regression management and debugging, functional verification, code coverage, Formal proofs, and verification reports, and will guide more junior members of the Verification team. Based in Vancouver...
Verification Design Engineer
We are currently looking for experienced ASIC Design Verification engineer who will be involved in all aspects of design verification activities using the latest methodologies with the help of automation keeping power and performance in mind. We are currently looking for experienced ASIC Design Veri...
Design Verification Engineer System Verilog
Role: Design Verification Engineer System Verilog. Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. Conduct full-chip and SoC simulations to validate design functionality and performance. Demonstrate expertise in subsystem verificat...
Foundry Services, Design Verification Engineer
The Design Verification Engineer in Foundry Services:. Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to mee...