SoC Data Path Engineer

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

THE ROLE:

We are seeking an experienced SoC Data Path Engineer to lead validation and debug of AMD's next-generation on-chip fabric and data transport architectures. This role focuses on post-silicon validation of fabric, coherency, memory, and compute data flows that enable communication across CPU, GPU, accelerator, and chiplet subsystems. You will play a critical role in ensuring performance, scalability, functionality, and reliability across complex multi-die products.

THE PERSON:

As a SoC Data Path Engineer, you will drive balanced, scalable, and automated solutions. In this high visibility position, your software systems engineering expertise will be necessary towards product development, definition, and root cause resolution.

KEY RESPONSIBILITIES:

• Lead post-silicon validation and debug of SoC fabric, interconnect, and system-level data transport architectures across graphics and compute products.
• Drive root-cause analysis of silicon issues involving coherency, routing, credit protocols, transaction ordering, memory interactions, and compute pipeline behavior.
• Develop and execute comprehensive validation plans while improving coverage through automation, tooling, fault injection, and stress-testing methodologies.
• Analyze scan dumps, silicon debug logs, and system telemetry to resolve hangs, stalls, synchronization failures, and protocol violations.
• Collaborate with design, firmware, driver, runtime, and software teams to debug complex hardware-software interactions and deliver robust product solutions.
• Lead cross-functional debug efforts spanning multiple IPs, chiplets, memory subsystems, and fabric domains to drive issue resolution and product readiness.

PREFERRED EXPERIENCE:

• Experience in post-silicon validation, hardware debug, or related semiconductor development roles, with demonstrated ownership of validation planning, execution, and milestone sign-off.

• Strong understanding of SoC architecture, multi-die/chiplet systems, on-chip fabrics, coherency protocols, memory hierarchies, caches, DMA, interrupts, and address translation mechanisms.

• Experience debugging complex silicon issues using scan dump analysis, JTAG-based tools, or similar debug methodologies, with the ability to root-cause system-level hangs, stalls, protocol violations, and performance bottlenecks.

• Proficiency in C/C++, Python, Perl, or similar languages for validation automation, debug tooling, and workflow optimization.

• Familiarity with graphics and compute architectures, GPU software stacks, runtime environments, and RAS features including error detection, fault handling, machine check logging, and system reliability mechanisms.

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in electrical or computer engineering

LOCATION:

Markham, ON

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

We are seeking an experienced SoC Data Path Engineer to lead validation and debug of AMD's next-generation on-chip fabric and data transport architectures. This role focuses on post-silicon validation of fabric, coherency, memory, and compute data flows that enable communication across CPU, GPU, accelerator, and chiplet subsystems. You will play a critical role in ensuring performance, scalability, functionality, and reliability across complex multi-die products.

THE PERSON:

As a SoC Data Path Engineer, you will drive balanced, scalable, and automated solutions. In this high visibility position, your software systems engineering expertise will be necessary towards product development, definition, and root cause resolution.

KEY RESPONSIBILITIES:

• Lead post-silicon validation and debug of SoC fabric, interconnect, and system-level data transport architectures across graphics and compute products.
• Drive root-cause analysis of silicon issues involving coherency, routing, credit protocols, transaction ordering, memory interactions, and compute pipeline behavior.
• Develop and execute comprehensive validation plans while improving coverage through automation, tooling, fault injection, and stress-testing methodologies.
• Analyze scan dumps, silicon debug logs, and system telemetry to resolve hangs, stalls, synchronization failures, and protocol violations.
• Collaborate with design, firmware, driver, runtime, and software teams to debug complex hardware-software interactions and deliver robust product solutions.
• Lead cross-functional debug efforts spanning multiple IPs, chiplets, memory subsystems, and fabric domains to drive issue resolution and product readiness.

PREFERRED EXPERIENCE:

• Experience in post-silicon validation, hardware debug, or related semiconductor development roles, with demonstrated ownership of validation planning, execution, and milestone sign-off.

• Strong understanding of SoC architecture, multi-die/chiplet systems, on-chip fabrics, coherency protocols, memory hierarchies, caches, DMA, interrupts, and address translation mechanisms.

• Experience debugging complex silicon issues using scan dump analysis, JTAG-based tools, or similar debug methodologies, with the ability to root-cause system-level hangs, stalls, protocol violations, and performance bottlenecks.

• Proficiency in C/C++, Python, Perl, or similar languages for validation automation, debug tooling, and workflow optimization.

• Familiarity with graphics and compute architectures, GPU software stacks, runtime environments, and RAS features including error detection, fault handling, machine check logging, and system reliability mechanisms.

ACADEMIC CREDENTIALS:

Bachelors or Masters degree in electrical or computer engineering

LOCATION:

Markham, ON

#LI-SL2

#LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.