Design Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next‑generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE:

The CIT team is a collaborative and innovative group focused on advancing hardware development through creativity and teamwork. We are seeking experienced ASIC Design Verification Engineers to join our growing team and contribute to the success of next‑generation technologies. In this role, you will be involved in all aspects of design verification, leveraging modern methodologies and automation to ensure high‑quality RTL and firmware design with power and performance in mind.

Our team designs AMD chiplet technology. The Design Verification group is responsible for developing scalable DV flows with an emphasis on automation, power efficiency, and performance. We value diversity and inclusion across our global organization and foster an environment that encourages continuous learning, technical innovation, and career growth.

THE PERSON:

We are looking for someone who enjoys solving complex problems and approaches challenges with strong analytical thinking and attention to detail. The ideal candidate communicates effectively, both verbally and in writing, and thrives in a collaborative team environment. They value diverse perspectives, demonstrate adaptability, and are committed to continuous learning and growth in a fast‑paced, innovative setting.

KEY RESPONSIBILITIES:

• Develop testbenches and verification components such as UVCs, models, BFMs, and reusable verification environments.
• Write, modify, and maintain constraint‑random and directed test cases and libraries in System Verilog/UVM.
• Analyze functional, code, and test plan coverage.
• Implement assertions, checkers, and monitors.
• Debug regressions and triage issues effectively.
• Apply industry‑leading verification methodologies such as UVM and Formal Verification.
• Reproduce functional bugs found in silicon using simulation and/or Formal Verification tools.
• Participate in code reviews and contribute to continuous improvement.
• Conducting and participating in code reviews.

PREFERRED EXPERIENCE:

• Significant experience in hardware verification.
• Proficiency in Verilog, System Verilog, UVM, and familiarity with Linux and Windows environments.
• Knowledge of ASIC design and ability to debug Verilog RTL code using simulation tools.
• Strong programming skills.
• Experience with Makefile and scripting languages such as Perl, Python, or Ruby.

ACADEMIC CREDENTIALS:

• Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or a related technical field

LOCATION:

• Markham, ON, Ottawa, ON, or Vancouver, BC

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal‑opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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