IREM Physical Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.Together, we advance your career.

THE ROLE:

Join a world-class team driving power integrity solutions for AMD’s next-generation SoCs and advanced packaging technologies. In this role, you’ll define and optimize power delivery networks, perform IR-drop and EM analysis using industry-leading tools, and shape design methodologies for cutting-edge CPU/GPU products. You’ll partner closely with physical design, packaging, and CAD teams, gaining exposure to advanced 3DIC integration and high-performance compute challenges. This is an opportunity to influence architecture-level decisions and work in a collaborative, innovation-driven environment.

THE PERSON:

The ideal candidate is detail-oriented, proactive, and thrives in a fast-paced, cross-functional environment. Strong communication, problem-solving, and a drive for continuous improvement are key. You are someone who enjoys debugging complex issues, collaborating with global teams, and developing automation to streamline workflows.

KEY RESPONSIBILITIES:

• Perform static/dynamic IR-drop and EM analysis and drive closure across large-scale SoCs.
• Define and optimize power grid architecture, including decap strategy and current distribution planning.
• Partner with physical design and packaging teams to align IR/EM signoff methodology with timing, floorplan, and system-level requirements.
• Develop and validate power integrity models; ensure correlation across PD, STA, and EMIR tools.
• Debug IR/EM issues, improve analysis methodology, and enable automation (Python/Tcl).
• Provide clear risk assessments and implement ECOs to mitigate power integrity challenges.

PREFERRED EXPERIENCE:

• Experience with IR-drop and EM analysis using tools such as RedHawk or Voltus.
• Knowledge of power delivery network design at chip and system levels (including advanced packaging/3DIC).
• Familiarity with PnR flows, timing closure, and UPF/CPF power intent.
• Scripting experience in Python or Tcl for automation and debug.
• Strong understanding of signoff correlation across multiple analysis domains.

ACADEMIC CREDENTIALS:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field preferred.

This role is not eligible for Visa Sponsorship.

#LI-LC3

#LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

Join a world-class team driving power integrity solutions for AMD’s next-generation SoCs and advanced packaging technologies. In this role, you’ll define and optimize power delivery networks, perform IR-drop and EM analysis using industry-leading tools, and shape design methodologies for cutting-edge CPU/GPU products. You’ll partner closely with physical design, packaging, and CAD teams, gaining exposure to advanced 3DIC integration and high-performance compute challenges. This is an opportunity to influence architecture-level decisions and work in a collaborative, innovation-driven environment.

THE PERSON:

The ideal candidate is detail-oriented, proactive, and thrives in a fast-paced, cross-functional environment. Strong communication, problem-solving, and a drive for continuous improvement are key. You are someone who enjoys debugging complex issues, collaborating with global teams, and developing automation to streamline workflows.

KEY RESPONSIBILITIES:

• Perform static/dynamic IR-drop and EM analysis and drive closure across large-scale SoCs.
• Define and optimize power grid architecture, including decap strategy and current distribution planning.
• Partner with physical design and packaging teams to align IR/EM signoff methodology with timing, floorplan, and system-level requirements.
• Develop and validate power integrity models; ensure correlation across PD, STA, and EMIR tools.
• Debug IR/EM issues, improve analysis methodology, and enable automation (Python/Tcl).
• Provide clear risk assessments and implement ECOs to mitigate power integrity challenges.

PREFERRED EXPERIENCE:

• Experience with IR-drop and EM analysis using tools such as RedHawk or Voltus.
• Knowledge of power delivery network design at chip and system levels (including advanced packaging/3DIC).
• Familiarity with PnR flows, timing closure, and UPF/CPF power intent.
• Scripting experience in Python or Tcl for automation and debug.
• Strong understanding of signoff correlation across multiple analysis domains.

ACADEMIC CREDENTIALS:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field preferred.

This role is not eligible for Visa Sponsorship.

#LI-LC3

#LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.