Vancouver, BC, Canada – Hybrid – onsite 25%-30% of the time and work from home.
Senior engineer or Junior Manager – experience with team leading required
As a founding premier member of RISC-V International, Andes is the leading supplier and technological innovator in the RISC-V market with a wide range of processor products fulfilling performance/area/power requirements. Andes has perfected the technology of quick and efficient design of custom extensions to its proprietary CPU. With over 10 billion cumulative shipments of SoCs embedded with Andes CPU IP, Andes products have covered audio, Bluetooth, gaming, GPS, machine learning, MCU and more. Our design innovation enables us to quickly adapt to the rapidly evolving demands of RISC-V customers.
Founded in 2005, Andes yearly revenue has tripled in size from $10 million in 2017 to $30 million in 2021. Andes was ranked among “100 Fastest-Growing Companies” in 2020 by CommonWealth Magazine. Headquartered in Taiwan, Andes is capitalizing on its current growth by branching out its offices to the US and Canada to expand on its current 300 employee workforce. Employees are valued as the key ingredient to the success of the company. They will have an opportunity to create a strong and positive impact on the company, where feedback is encouraged and implemented.
This role is a part of the VLSI team, which is part of Andes worldwide CPU development team. Andes is a rapidly growing organization, and you will get the opportunity to work with a team of experienced architects, designers and DV engineers for building next-generation of RISC-V CPUs.
As a leader of this team, you will define verification methodologies, analyze problems, and devise best QoR solutions. You will be able to participate in engineering discussions and drive analysis and propose directions. We value diligence, detail orientation and a penchant for creating high-quality results efficiently. You will have the opportunity to mentor junior members of the team. Ideal applicants will have a passion for technical advances, CPU architecture and have a keen interest in tackling present day verification problems.
Design Verification Manager • Vancouver, Metro Vancouver Regional District, CA
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