RTL Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE : Collaborate with architects and software teams to define and implement SDMA micro-architecture, RTL, and firmware, aiming for high-quality, low-power design solutions. THE PERSON : You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Drive RTL and firmware design and synthesis for selected system IP components Deliver high-performance, low-power design implementations Execute front-end integration flows (synthesis, LINT, DFT, etc.) and generate high-quality netlists Collaborate with RTL owners and physical design teams to achieve timing closure and validate reports Contribute to RTL development of system IP blocks : study specifications, implement functionality, and work closely with verification engineers on debug and issue resolution PREFERRED EXPERIENCE : Hands-on experience with synthesis, timing analysis, and formal verification Strong background in ASIC or FPGA projects Proficiency in Verilog design Familiarity with front-end EDA tools and flows Advanced scripting / programming skills in Ruby, Perl, Python and Makefile Proven debugging skills in pre-silicon simulation / emulation and post-silicon validation at RTL and system levels Firmware development experience (highly desirable, strong plus) ACADEMIC CREDENTIALS : Masters or Bachelors in Electrical Engineering or similar is preferred. LOCATION : Markham, CA #LI-SC3 #LI-HYBRID Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.THE ROLE : Collaborate with architects and software teams to define and implement SDMA micro-architecture, RTL, and firmware, aiming for high-quality, low-power design solutions. THE PERSON : You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. KEY RESPONSIBILITIES : Drive RTL and firmware design and synthesis for selected system IP components Deliver high-performance, low-power design implementations Execute front-end integration flows (synthesis, LINT, DFT, etc.) and generate high-quality netlists Collaborate with RTL owners and physical design teams to achieve timing closure and validate reports Contribute to RTL development of system IP blocks : study specifications, implement functionality, and work closely with verification engineers on debug and issue resolution PREFERRED EXPERIENCE : Hands-on experience with synthesis, timing analysis, and formal verification Strong background in ASIC or FPGA projects Proficiency in Verilog design Familiarity with front-end EDA tools and flows Advanced scripting / programming skills in Ruby, Perl, Python and Makefile Proven debugging skills in pre-silicon simulation / emulation and post-silicon validation at RTL and system levels Firmware development experience (highly desirable, strong plus) ACADEMIC CREDENTIALS : Masters or Bachelors in Electrical Engineering or similar is preferred. LOCATION : Markham, CA #LI-SC3 #LI-HYBRID

Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.