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Formal Verification Engineer
Formal Verification EngineerAdvanced Micro Devices • Markham, York Region, CA
Formal Verification Engineer

Formal Verification Engineer

Advanced Micro Devices • Markham, York Region, CA
1 day ago
Job type
  • Full-time
Job description

Overview

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

AMD is seeking a passionate and talented Formal Verification Engineer to join our dynamic GFXIP (Graphics IP) Formal Verification team. This role offers you the chance to work with some of the most talented formal verification experts in the industry, applying cutting-edge formal techniques to verify our complex GPU designs. This is an excellent opportunity for a recent graduate or early-career professional to grow their skills in a collaborative and innovative environment.

The Person

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Key Responsibilities

  • Drive formal verification execution with support from FV tech leads for GFX-IP blocks
  • Collaborate with design and architecture teams to understand design specifications and develop verification requirements
  • Utilize formal techniques to build comprehensive testbenches, striving for better convergence of formal proof
  • Debug testbench and / or design issues using formal tools and provide feedback for design improvements
  • Responsible for verification quality metrics like pass rates, code / functional coverage and proof convergence
  • Document formal verification processes, findings, and best practices
  • Continuously learn and stay abreast of advancements in formal verification and related technologies

Preferred Experience

  • Good understanding of computer organization / architecture
  • Knowledge of scripting languages such as Python or TCL
  • Internship or project experience in digital design or verification
  • Experience or familiarity with formal tools and / or functional verification tools from Synopsys, Cadence or Mentor Graphics
  • Academic Credentials

  • Undergrad degree required. Bachelor’s or Master’s degree in computer engineering / Electrical Engineering preferred
  • This role is not eligible for Visa sponsorship.

    #LI-EV1

    #LI-HYBRID

    Benefits offered are described : AMD benefits at a glance.

    AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

    AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

    This posting is for an existing vacancy.

    #J-18808-Ljbffr

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    Formal Verification Engineer • Markham, York Region, CA

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