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Design Verification Engineer

Klünter Design KölnVancouver, Metro Vancouver Regional District, Canada

30+ days ago

Job type

Full-time

Job description

We are looking for a team player with solid technical skills to add to our core engineering team. Candidates must have a strong technical background and be capable of coming up to speed on new technologies quickly. Good communication skills, great problem-solving skills, and the ability to work both individually and collaboratively in a team environment are required. If you enjoy working in a fast-paced environment with the smartest team and the very latest technology, then this is the job for you! This is a mid-level engineering position, developing embedded software for our state Linux platform.

Role

Test bench development, Directed / constrained random test generation, Failure analysis and resolution, and coverage analysis.

Education

B.S / M. S in Electrical Engineering or related field plus minimum 3 years of SoC full chip / block level verification experience

Experience

Experience with PCIe / CXL, AXI, Ethernet

Experience with FPGA emulation

Prior experience working with Ethernet NIC or Switch ASICs

Special Skills

What we are looking for in this position :

Advanced knowledge of standard ASIC design and verification flows, simulation and test bench development

Advanced knowledge of System Verilog and the UVM methodology

Solid verification skills in problem-solving, constrained random testing, coverage closure, gate-level simulations, X propagation.

Experience writing scripts in languages such as Perl or Python

Team player with excellent communication skills and the desire to take on diverse challenges

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Design Engineer • Vancouver, Metro Vancouver Regional District, Canada