GPU Design Verification Engineer

Company

Qualcomm Canada ULC

Job Area

Engineering Group, Engineering Group > GPU ASICS Engineering

General Summary

Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP, and performing pre‑ and post‑silicon verification to verify correctness and ensure performance and power goals are met.

Responsibilities

• Owning and executing on key independent tasks towards program requirements
• Using verbal and written communication skills to convey basic, routine factual information about day‑to‑day activities to others who are fully knowledgeable in the subject area
• Working within prescribed timeline requirements and resource constraints
• Applying independent creative thought to troubleshoot technical problems or deal with novel circumstances
• Research through available resources and engagement with various inter‑disciplinary teams
• Using deductive problem solving to solve moderately complex problems; some limited data analysis may be required
• Applies Graphics knowledge and experience to architect, design, implement, and verify the structure and performance of GPU hardware, drivers, features, applications, and tools
• Creates and maintains verification test benches and environments in System Verilog/UVM
• Creates and leverages advanced testing frameworks to generate and recreate real‑world system integration conditions
• Collaborates with Architecture, Software, Firmware, Design, Modeling, Emulation and Post‑silicon validation teams to define and develop test methodology and content
• Participates in GPU architecture, micro‑architecture reviews
• Collects, organizes and executes various forms of system level test content including directed test cases, gaming benchmarks, standards compliance test suites, and system level scenarios
• Builds automation for continuous integration and testing based on latest GPU IP
• Helps collect and analyze test results using straightforward statistics and data predictions to track benchmarks and identify issues
• Works with team members to understand and align on narrow scope of feature development and meet targets
• Writes technical documentation and feature descriptions for straightforward projects under the direction of a supervisor

Minimum Qualifications

• Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 2+ years of Software/Hardware/Systems Engineering or related experience
• Master’s degree in the same fields and 1+ year of related experience
• PhD in the same fields

Preferred Qualifications

• 1+ years of Hardware, Software, Systems Engineering, or related experience
• Verification skills: test planning, scripting, simulation, problem solving and debugging
• System Verilog, UVM, Verilog or VHDL, C/C++ skills required
• Constrained random, functional coverage development, design debug experience required
• Exposure to Emulation/Prototyping Platforms (Veloce, Palladium, Zebu, FPGA)
• Master’s degree in Electrical or Computer Engineering, Computer Science, or related field
• 2+ years relevant GPU experience (either external or internal)

Preferred Skills

• Experience in GPU based verification
• Experience in system or sub‑system level verification
• Concurrency, preemption, stress testing frameworks
• Testbench architecture and implementation
• GFX API exposure: Vulkan/DX11/DX12
• Scripting and automation skills (Python, Make, Airflow, etc.)
• Embedded firmware development and debugging
• Benchmarking and performance analysis
• Windows and/or Linux OS kernel architecture
• C/C++, GNU Toolchain, Visual Studio
• Formal verification – FPV and DPV experience is a plus
• Experience with emulation/prototyping/hybrid build and execution flows (Veloce, Palladium, Zebu, Protium, HAPS, qemu)
• Development of synthesizable transactors, monitors, scoreboards for emulation platforms
• Embedded firmware and/or kernel level development and debugging skills (C/C++, Makefile, gdb, uboot, uefi, kernel‑mode drivers)

Applicants

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