FPGA Verification Engineering Student

Develop FPGA verification skills with SystemVerilog, VHDL, and UVM at MDA Space in Sainte-Anne-de-Bellevue, Quebec, working on-site.

This Engineering Student mandate supports FPGA verification for space applications including robotics, radar imagery, command and control, telecommunications, and digital signal processing. Reporting to a Senior Designer, you will work similarly to a new graduate, with assignments matched to your education and experience. The mandate lasts four months, with possible extension to eight months, starting January 2027.

Key Responsibilities:

• Develop SystemVerilog or VHDL FPGA verification test benches
• Apply Universal Verification Methodology techniques and approaches
• Write test cases verifying stated requirements
• Develop and support test infrastructure
• Document problems and support laboratory testing

Requirements:

• Complete third year of electrical or computer engineering degree
• Maintain minimum academic performance of 3.2 out of 4.0
• Experience with VHDL or Verilog
• Knowledge of Linux, Confluence, Jira, SVN, or Git
• Know French and English; obtain required security clearances

Apply FPGA verification, UVM, and hardware testing knowledge to space systems at MDA Space in Sainte-Anne-de-Bellevue.

#J-18808-Ljbffr