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Design Verification Engineer

Design Verification Engineer

Advanced Micro DevicesVancouver, Metro Vancouver Regional District, Canada
22 days ago
Job type
  • Full-time
Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance.

THE ROLE :

AMD is looking for motivated individuals seeking opportunities to solve complex problems in a fast-paced work environment. The successful candidate will be involved in all aspects of AMD's next generation products. This includes verifying PCI Express designs using the latest UVM standard and developing comprehensive test plans to ensure coverage closure. The candidate will also apply low power verification methodology and measure overall system performance of our IP. The position allows exposure to all aspects of ASIC design stages.

THE PERSON :

  • Creative innovator and thinker who loves technical problems and detail-oriented tasks.
  • Exhibits relentless commitment to help the team meet quality and development goals on schedule.
  • Drives to learn and perform at his or her highest potential in a technical capacity.
  • Thrives in both a team environment and in individual contribution.
  • Communicates openly and clearly in meetings, presentations, emails, and reports.
  • Able to learn independently and acquire new skills required for the job.
  • Flexible in working hours to accommodate working with co-workers in different time-zones.

KEY RESPONSIBILITIES :

  • Writing, implementing, and reviewing test plans.
  • Developing testbenches and verification components such as UVCs, models, BFMs, and reusable verification environments.
  • Writing, modifying, and maintaining random and directed test cases and libraries in System Verilog / UVM.
  • Analyzing functional, code, and test plan coverage.
  • Implementing assertions, checkers, and monitors.
  • Utilizing in-house and third-party IP / SOC CAD and EDA tools for design verification.
  • Deploying industry-leading verification methodologies such as UVM and formal verification.
  • Triaging and debugging regressions.
  • Reproducing functional bugs found in silicon in simulation verification tools.
  • Conducting and participating in code reviews.
  • Technical leadership is an asset, including driving projects from start to finish and design verification sign-off.
  • PREFERRED EXPERIENCE :

  • Digital design in RTL, Verilog HDL.
  • Testbench architecture, System Verilog, UVM.
  • C / C++, Java, or other object-oriented programming languages.
  • Perl, Ruby, shell-scripting, UNIX / LINUX environment.
  • VCS, NCSIM, Questa, or other simulators and associated waveform viewers such as Verdi.
  • PC system architecture : PCI Express, x86, ARM.
  • On-chip bus interfaces and architectures : AMBA AXI, OCP, PIPE.
  • ACADEMIC CREDENTIALS :

  • Masters or Bachelor with working experience in ASIC area.
  • LOCATION : Vancouver

    Benefits offered are described : AMD benefits at a glance .

    AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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