Electrical Design Engineer

Key Responsibilities

• Develop hardware solutions to support Kepler’s space technology that requires the utilization of leading technology and practices
• Support design reviews for active designs to minimize design gaps
• Conduct and document engineering analysis including derating, reliability, radiation, EMI/EMC, FMECA, and power budgets
• Support pathfinding development for future satellite generations that will utilize new technology and interfaces including UFS, 10G+ Ethernet, PCIE5, various other high‑speed interfaces, new memory technology, and processors
• Maintain technical documentation that captures design decisions, design specifications, block diagrams, interface requirements, and system architecture reports
• Develop full product solutions by working closely with other cross‑functional engineering teams including RF, mechanical, software, and FPGA

Required Skills & Qualifications

• Bachelor’s Degree in Electrical Engineering or equivalent
• 4+ years of experience designing, developing, and validating complex electronic hardware systems from concept through production, with demonstrated ownership of technical deliverables and successful design execution
• Proven ability to lead hardware development efforts from concept definition through schematic design, PCB layout and/or layout oversight, integration, verification, and design validation testing
• Strong proficiency with industry standard schematic capture and PCB layout tools such as Altium Designer or equivalent
• Proven experience integrating processors, FPGAs, and SoCs into high‑performance embedded systems, including successful implementation and debugging of high‑speed digital interfaces
• Ability to design and validate mixed‑signal circuitry incorporating ADCs, DACs, sensors, and precision analog signal chains while meeting performance requirements such as noise, accuracy, and dynamic range
• Demonstrated success implementing and troubleshooting high‑speed interfaces such as JESD204B, Ethernet (1G/10G+), PCIe, or equivalent protocols, including signal integrity considerations and laboratory validation
• Familiarity with clocking architectures, oscillator selection, timing distribution, and synchronization requirements in complex digital systems
• Proven capability designing passive and active analog signal‑conditioning circuits, including filter design, analysis, and validation
• Ability to identify technical risks early, develop mitigation strategies, and drive resolution through design reviews, testing, and cross‑functional collaboration
• Strong hands‑on debugging and root‑cause analysis skills with experience using oscilloscopes, spectrum analyzers, multimeters, logic analyzers, and other laboratory equipment to validate hardware performance and resolve complex issues
• Ability to develop test plans, execute validation activities, analyze results, and clearly communicate findings and recommendations
• Strong written and verbal communication skills, with the ability to produce comprehensive design documentation including requirements, specifications, interface definitions, test plans, and engineering reports
• Demonstrated success collaborating across multidisciplinary teams including RF, FPGA, software, systems, mechanical, manufacturing, and test engineering to deliver integrated product solutions

Bonus Points

• Master’s Degree in Electrical Engineering or equivalent
• Ability to develop interface control requirements and system‑level integration strategies that enable successful hardware, software, FPGA, and subsystem interoperability
• Experience conducting and documenting analyses such as reliability assessments, derating evaluations, FMECA, power budgets, EMI/EMC assessments, and environmental qualification planning
• Experience designing memory subsystems utilizing technologies such as QSPI, eMMC, DDR3/DDR4, UFS, or similar, including interface bring‑up, timing validation, and performance characterization
• Experience designing power distribution, monitoring, and fault‑management architectures, including implementation of health monitoring, protection mechanisms, and FDIR concepts

Benefits

• Competitive compensation with a robust equity plan
• Comprehensive coverage for health, dental, and vision insurance—including dependents
• Unlimited vacation, supportive parental leave policy, and company‑wide holiday shutdown
• Semi‑annual company‑wide parties and frequent in‑office team events
• Relocation packages available for approved roles
• $1,500 annual professional development fund to support your growth
• Fully stocked Toronto office kitchen with snacks, drinks, games and top‑notch kitchen appliances
• Town Halls, Celebration Calls, and company‑wide events to stay connected and engaged
• Certified Great Place to Work for five years in a row

Salary Range: $113,474 - 163,474 CAD. Actual total compensation will be determined at the Company’s discretion and is based on a variety of job‑related factors, which may include, but are not limited to, relevant knowledge, skills, experience, performance, and education and/or training. The Company encourages all qualified applicants to apply, even if the posted salary range does not align with their expectations, as it does not reflect our total compensation package.

Job Type: Contingent Upon Program Award

Position Status: Contingent Upon Program Award

Employment Equity & Accommodation Statement

Kepler Communications is an equal opportunity employer committed to building a diverse and inclusive workplace. We welcome applications from all qualified individuals, including women, Indigenous peoples, persons with disabilities, members of visible minorities, and people of all sexual orientations and gender identities.

If you require accommodation during any stage of the recruitment process, please contact our People & Culture team at accommodation@kepler.space, and we will work with you to meet your needs.

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