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Manager of Design Verification at AndesRiscv • Vancouver, Metro Vancouver Regional District, Canada
Manager of Design Verification at Andes

Manager of Design Verification at Andes

Riscv • Vancouver, Metro Vancouver Regional District, Canada
30+ days ago
Job type
  • Full-time
Job description
Elevate design verification standards at Andes in Vancouver. This hybrid manager role calls for strong leadership skills and a passion for CPU design verification. Join the Andes team as the Design Verification Manager, where you will lead a dedicated group focused on enhancing verification methodologies for advanced CPU architectures. Your experience will be pivotal in navigating verification challenges and mentoring junior engineers. This hybrid position allows for flexibility while contributing crucial insights to the fast-paced RISC-V technology sector. Key Responsibilities: • Mentor other team members in verification techniques • Ensure project timelines and deliverables are met • Discuss technical aspects with team members • Analyze CPU designs to determine verification best practices • Resolve issues related to functional verification and debugging Requirements: • Bachelor’s or Master’s degree in engineering • Proven experience in verifying designs to high-quality standards • Strong experience with Verilog, System Verilog, UVM • Excellent leadership and communication skills • Familiarity with Unix and scripting tools Take the lead in creating quality verification processes that drive success at Andes. #J-18808-Ljbffr
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Manager of Design Verification at Andes • Vancouver, Metro Vancouver Regional District, Canada

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