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Lead auditor Jobs in Saguenay, QC
Lead C++ Software Engineer
Cadence Design Systems, Inc.ROYAL ,MOUNT- Promoted
Team Lead Tools DevOps
UbisoftSaguenay, Quebec, CanadaLoss Prevention Site Lead
Amazon Canada Fulfillment Services, ULC.East Bolton, Quebec, CANConseiller en architecture intermédiaire / sénior - sécurité des données
TEHORAQC, CAChef.fe d'équipe, programmation graphique / Lead Programmer, Graphics
2710 WB Games Montreal Inc.Remote Quebec- Promoted
Lead Technique / Technical Lead
Clear DestinationGreater Montreal Metropolitan Area, Canada- Promoted
Lead Java Developer
CGIGreater Montreal Metropolitan Area, Canada- Promoted
Programming Team Lead Engine
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Snowed In StudiosQC, CADéveloppeurs / Tech lead
FX INNOVATIONRemote, QuebecCourier Team Lead
FedExCHICOUTIMI, Quebec, CATeam Lead - Software development
CoveoProvince of QuebecConcepteur(rice) en chef(fe) | Lead Designer - Ghostpunch Games
PTWQC, CATech Lead / Développeur
ITIQuébec,Stage Experience Lead - Full Time
SephoraSaguenay, QC, CACPMO Lead
Medavie Blue CrossQuebec, CANeighborhood Health Team Lead Nurse
Bayshore HealthCareHawksbury / Les Coteaux / St-Zotique, Quebec, CanadaTests Means and Tools Team Lead
CS GROUPQC, ca- Promoted
Lead DevOps - Java
AstekGreater Montreal Metropolitan Area, CanadaMedia Acquisition Marketing and E-Commerce Lead
Proforce PersonnelQuebec, CALead C++ Software Engineer
Cadence Design Systems, Inc.ROYAL ,MOUNT- Full-time
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
We are looking for an exceptional C++ software engineer to join the Protium Software Development Team to develop and enhance the Protium FPGA-Based Prototyping product which is used by leading CPU / GPU / HyperScaler companies for pre-Silicon software validation of their SOC’s.
You will develop new algorithms and optimizations for QoR (Quality of Results) and performance for the Protium Compiler working with a small team of super star engineers to develop our next generation FPGA based verification platform.
Responsibilities :
Enhance Static Timing Analysis (STA)in the Protium Compiler.
Work includes implementingnew algorithms in C++to support Multi-cycle constraints and other SDC exceptions such as set_false_path.
Optimize memory and runtime by using multi-threading and distributed computing .
Develop the EDA automation flow for the platform with other engineers.
Write Design Specifications and Unit Tests for your code
Position Requirements / Qualifications :
- Bachelors in Computer Science, Electrical / Computer Engineering and a minimum of 4 years of related experience, or Masters and a minimum of 2 years of related experience, or PhD with thesis in a relevant area.
- Ideally you are a solid contributor in the FPGA or ASIC prototyping / synthesis / verification space and have delivered great QoR on these platforms.
- You are well renowned for your excellent programming skills in C / C++ and you document your work clearly and love talking about it to your team.
- You are very comfortable with Verilog or SystemVerilog and understand digital circuits .
- Usage of popular logic simulators and some experience in multi-threaded / concurrent programming are pluses.
- The role requires exceptional software skills and Object Oriented Programming experience to be a good match
- Knowledge and experience of ML / AI algorithms and deployment in production code a plus
We’re doing work that matters. Help us solve what others can’t.