SERDES Analog Design Engineer/ Architect

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THE ROLE:
AMD SERDES Technology Group develops high-performance electrical and optical transceivers in advanced CMOS PDKs. We are seeking PHY circuit/link-architect.

THE PERSON:
The ideal candidate will have a background in electrical/optical PHY circuit/logic design and micro-architecture. He/she needs to be a self-starter who collaborates well with various functional teams and customers to successfully drive projects to completion.

KEY RESPONSIBILITIES:

• Transceiver circuit/link micro-architecture definition, implementation, verification, and documentation: clock generation and distribution, data path, DSP, CDR, calibration & adaptation loops
• Top-level and block-level electrical/optical link budgeting and modeling.
• Circuit design spec definition of transceiver building blocks (ADC, DAC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer, etc.)

PREFERRED EXPERIENCE:

• The successful candidate will have extensive design experience in both optical and electrical transceiver design
• Expert level experience in data converters, especially in high speed ADC and/or DAC
• Experience in advanced PDK design

ACADEMIC CREDENTIALS:

• PhD in Electrical Engineering or related fields or M.S. with relevant experience with extensive design experience in both optical and electrical transceiver design

LOCATION: San Jose, California

#LI-TB2

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:
AMD SERDES Technology Group develops high-performance electrical and optical transceivers in advanced CMOS PDKs. We are seeking PHY circuit/link-architect.

THE PERSON:
The ideal candidate will have a background in electrical/optical PHY circuit/logic design and micro-architecture. He/she needs to be a self-starter who collaborates well with various functional teams and customers to successfully drive projects to completion.

KEY RESPONSIBILITIES:

• Transceiver circuit/link micro-architecture definition, implementation, verification, and documentation: clock generation and distribution, data path, DSP, CDR, calibration & adaptation loops
• Top-level and block-level electrical/optical link budgeting and modeling.
• Circuit design spec definition of transceiver building blocks (ADC, DAC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializer, etc.)

PREFERRED EXPERIENCE:

• The successful candidate will have extensive design experience in both optical and electrical transceiver design
• Expert level experience in data converters, especially in high speed ADC and/or DAC
• Experience in advanced PDK design

ACADEMIC CREDENTIALS:

• PhD in Electrical Engineering or related fields or M.S. with relevant experience with extensive design experience in both optical and electrical transceiver design

LOCATION: San Jose, California

#LI-TB2

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.