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Senior Engineer II -Validation
Senior Engineer II -ValidationMicrochip Technology • Burnaby, Canada
Senior Engineer II -Validation

Senior Engineer II -Validation

Microchip Technology • Burnaby, Canada
Il y a plus de 30 jours
Type de contrat
  • Temps plein
Description de poste

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip’s nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our ; we affectionately refer to it as the and it’s won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.

Visit our page to see what exciting opportunities and company await!

Job Description:

Microchip’s Data Center Solutions (DCS) Business Unit delivers industry-leading performance, reliability, and security through Storage Controllers, Memory Controllers, NVMe SSD Controllers, PCIe Switches, and SAS Expanders. These products are widely deployed in cloud storage, compute data centers, and storage area networks.

As a System Validation Engineer, you will be part of a highly skilled team responsible for the bring-up, integration, and validation of advanced System-on-Chip (SoC) products for the DCS Business Unit.

System Validation Engineers design and build the infrastructure required to test new silicon device designs and the firmware that operates on them. This includes developing prototype ecosystems such as boards, FPGAs, firmware, software, and automation suites, and integrating these with internal test equipment, protocol analyzers, exercisers, and x86-based hardware.

Validation Engineers create comprehensive test plans based on design specifications, marketing requirements, and industry standards—including PCIe, CXL, DDR4/5, NVMe, SAS, SATA, and NAND flash—commonly used in cloud data centers and storage area networks. Using these test plans and validation infrastructure, engineers develop and execute pre- and post-silicon tests to thoroughly evaluate prototype SoC devices and embedded firmware.

Success in this role requires strong skills in system integration, testing, debugging, and problem-solving. You will gain in-depth knowledge of protocol specifications, IP design, and SoC architecture, and have opportunities to collaborate with teams across silicon design, firmware, emulation, verification, and applications. The position also offers prospects for internal mobility and career growth.

We are seeking adaptable engineers with excellent multi-disciplinary debug and problem-solving skills, who are committed to project schedules, quality, and team collaboration. Immediate technical expertise is required, and while ongoing learning is expected, we are hiring for a senior engineer with proven experience across multiple technical domains.

Job Responsibilities

Responsibilities include but are not limited to:

  • Integrating prototype SOC Device HW and FW into a complete solution. This includes working with emulation platforms, proto-ICs, validation boards, FW and SW to bring an entire system level solution to life and enable functional testing and FW development.

  • Develop, execute, and document a series of feature-tests that will fully validate the operation of the SoC and its various functional HW blocks and FW to ensure all components and the overall SoC is functioning per design specs, achieves expected performance and meets industry requirements and standards.

  • Working with pre-silicon FGPA based emulation platforms and prototype (post-silicon) ICs/SOCs.

  • Building and maintaining validation infrastructure through the development of boards, FPGAs, embedded software, device drivers and test bench scripts.

  • Developing block, subsystem and system level test FW and scripts, and further integrating them in to best-in-class test automation suites.

  • Leading activities in ones own area of technical expertise and supervising junior engineers in these areas.

  • Running complex tests and conducting investigations in a lab environment on-site and remotely.

  • Integrating and deploying AI based tools to enhance and optimize daily testing routine.

  • Finding and reporting bugs. Working with cross-expertise teams and leading efforts to isolate, investigate and solve them.

  • Learning and dynamically applying knowledge of the device, system, protocols, and industry standards.

  • Help grow and train the validation team.

  • Effectively presenting technical information to internal and external groups.

The role and responsibilities will grow with the individual candidate’s skills and interests.

Requirements/Qualifications:

  • Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science

  • 5+ years of relevant industry experience (less experienced applicants may be considered for other levels)

  • Prior SOC and IC validation experience

  • Subject Matter Expert with one or more of SAS/SATA, PCIe, DDR, I2C, SPI protocols.

  • Hands-on experience with prototype ICs, boards, and hardware infrastructure

  • Proficient in lab environments; familiar with test equipment and protocol analyzers

  • Skilled in SoC debug and investigation using firmware and MIPS debug environments

  • Strong understanding of digital systems and computer architecture

  • Solid foundation in Data Communication and Digital Design theory

  • Proficient in scripting languages (Python, Tcl/Tk) and C/C++ programming

  • Demonstrated analytical and problem-solving abilities

  • Experience defining comprehensive test coverage at sub-block and system levels using design specifications, feature requirements, and industry standards

  • Ability to develop and execute functional validation test plans and validation software/scripts with minimal supervision

  • Knowledge of PCIe system architecture and protocol; ability to read and analyze PCIe protocol traces (asset)

  • Thorough knowledge of circuit theory and high-speed signal fundamentals

  • Quick learner of new technologies, protocols, and standards

  • Effective team player; collaborates well with peers and cross-functional groups

  • Strong communication and interpersonal skills

  • Demonstrated expertise in specific validation subject areas

Other Useful Qualification:

  • SoC performance validation and tuning experience (asset)

  • Experience with prototype boards, board modifications, and schematic reading

  • Hands-on hardware experience with x86-based systems

  • Experience in Linux and Windows OS environments

  • Familiarity with AI-based tools and their integration into workflow

  • Experience with PCIe and CXL compliance testing (asset)

  • Testing and debugging high-speed SERDES

  • Familiarity with FPGA-based emulation environments and pre-silicon test coverage deployment (asset)

  • Experience in high-speed digital design, board design, PCB layout, signal integrity, and manufacturing processes (asset)

  • Experience developing and debugging MIPS-based architectures; firmware programming in C/C++

  • Working knowledge of protocols: PCIe, CXL, DDR, NVMe, ONFI, SAS, SATA, I2C, SPI; protocol trace debugging

  • In-depth knowledge of Linux OS architecture and drivers

  • Linux or Windows host driver development experience

  • Knowledge of FPGA layout tools and VHDL/Verilog coding

  • ThreadX or RTOS knowledge

Travel Time:

0% - 25%

Pay Range:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive base pay, restricted stock units, and quarterly bonus payments. In addition to these components, our package includes health benefits that begin day one, retirement savings plans, and an industry leading IESPP program with a 6-month look back feature. Find more information about all our benefits at the link below:The annual base salary range for this position is $86,000 - $186,000.*

*Range is dependent on numerous factors including job location, skills and experience.

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Senior Engineer II Validation • Burnaby, Canada

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