Join a ground-breaking team as a Senior ASIC Design Engineer specializing in micro-architecture and efficient RTL delivery. Be part of innovation that shapes AI and self-driving technologies. In this role, you will utilize 8+ years of experience to implement high-performance designs crucial for real-time processing and advanced graphics. Your collaboration with architects and verification teams is essential for ensuring that the designs meet the rigorous demands of modern computing applications. Focus on analysis, architecture, and validation activities critical to ASIC performance. Key Responsibilities: • Implement efficient RTL and document design specifications • Analyze and optimize architectural trade-offs • Collaborate on micro-architecture and verification • Support critical designs for computation and data flow • Design features to assist in silicon debugging Requirements: • Bachelor's Degree in Electrical Engineering or Computer Science • 8+ years of related ASIC design experience required • Expertise in RTL development using Verilog • Strong knowledge of the ASIC design and verification process • Familiarity with CPU subsystems and dataflow architectures preferred Your contributions will play a key role in advancing innovative computing solutions and redefining technology boundaries. #J-18808-Ljbffr
Experienced Engineer in ASIC Design • Toronto, ON, Canada
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