Job Description
Come join the Extreme Scale Computing Team as a Programable Logic Complication Lead! We are developing the next generation prototype solutions across signal processing, supercomputing, Memory, and heterogenous computing systems. If you have a strong interest to influence next-generation development of spatial compute architecture, this is the team to join.
We are looking for a place and route expert to lead the development of advanced reconfigurable computation engines for spatial processing the team is developing. This role has the ability to expand what is possible with programmable logic architectures to deliver advanced protypes for a wide variety of hardware systems under contract. Useful skills include:
Expertise in place and route for FPGA:
Prior experience and familiarity with current (Verilog-to-routing) VTR tool.
System and processor performance analysis experience.
Understanding of hardware design and implementation.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
The candidate must have a Bachelor's Degree in Computer Engineering, Computer Science or other related STEM degree and 9+ years of experience -OR- a Master's Degree in Computer Engineering, Computer Science or other related STEM degree and 6+ years of experience in:
Design principles and techniques in at least two of:
Programable Logic compilation and software stack development, ideally Verilog-to-Routing (VTR) open source tool.
Experience with Computer Architecture, Microprocessor or Chip-set design methods.
Emulation software stack development.
Preferred Qualifications
C/C++/Python skills.
Strong Scripting and design automation experience.
Inside this Business Group
Posting Statement
Benefits
Working Model
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