NPU / AI Processor Synthesis Engineer

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group >

Hardware Engineering

Role Overview

The NPU Synthesis Lead will be responsible for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems in cutting-edge SoCs. This role involves leading synthesis flows, optimizing for PPA (Performance, Power, Area), and collaborating with architecture, RTL, and physical design teams to ensure high-quality netlists for advanced technology nodes.

Key Responsibilities

Synthesis Ownership

• Lead RTL-to-gate-level synthesis for NPU IP and subsystems using industry-standard tools (Synopsys Design Compiler, Cadence Genus).
• Develop and maintain synthesis scripts and flows for hierarchical and flat designs.

Timing Closure

Power & Area Optimization

Constraint Management

Cross-Functional Collaboration

Quality Checks

Flow Innovation

Team Leadership

Minimum Qualifications

Required Skills

Technical Expertise

Low-Power Design

Scripting

EDA Tools

Leadership

Education

Experience

Preferred

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