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IC Design Engineer
IC Design EngineerNETINT Technologies • Burnaby, Metro Vancouver Regional District, CA
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IC Design Engineer

IC Design Engineer

NETINT Technologies • Burnaby, Metro Vancouver Regional District, CA
Il y a plus de 30 jours
Type de contrat
  • Temps plein
Description de poste

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This range is provided by NETINT Technologies. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

CA$100,000.00 / yr - CA$160,000.00 / yr

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About NETINT Technologies Inc.

NETINT Technologies is a pioneer of computational storage and video processing SoC solutions for cloud and edge computing. Its Codensity portfolio enables enterprise, cloud data centers, and content providers to deploy high-performance applications that they can scale without limit while minimizing their data storage and video processing costs. NETINT, founded by an experienced team of storage SoC veterans, is a Canadian venture‑funded startup with R&D facilities in Vancouver, Toronto, and Shanghai, China. For more information, visit www.netint.ca.

Job Scope

As an IC design engineer, you will work closely with system architects and design leads on the design of a sub‑system in SoCs. Responsibilities include participating in subsystem micro‑architecture and IP vendor selection, sub‑system design / verification / backend support. You will also support firmware bring‑up, pre‑tape‑out FPGA verification, and system validation on the sub‑system.

Responsibilities

  • Understand the requirements for the sub‑systems
  • Participate in sub‑system micro‑architecture and IP vendor selection
  • Write or understand sub‑system documentation
  • Deliver RTL that meet specifications and performance
  • Build test bench and verify RTL if required
  • Test logic and interactions between HW / FW in FPGA environment
  • Build FPGA using Xilinx Vivado tools and release to System team for testing.
  • Support FW, HW and system validation / debug

Qualifications

  • MS , BS in Electrical / Computer Engineering or equivalent
  • Minimum 3.5 years of IC or FPGA Design experience
  • Demonstrated solid RTL coding skills in Verilog and SystemVerilog
  • Demonstrated solid HW / system debug skills
  • Experience with verification methodology and test coverage
  • Desire to work in an energetic start‑up environment
  • The ability to analyze complex HW issues
  • Skills to recreate the issue in a controlled environment
  • Detail analytical skills to root cause issues
  • Find creative solutions to difficult system‑level problems
  • Very good documentation skills
  • We thank you for your interest, however, only candidates selected for an interview will be contacted.

    NETINT Technologies Inc. is an equal opportunity employer and strives to ensure that its hiring process meets the needs of all persons with disabilities. As such, NETINT will provide reasonable accommodation for any applicant, as requested during the hiring process.

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    Design Engineer • Burnaby, Metro Vancouver Regional District, CA

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