Mid-Senior ASIC Verification Engineer (UVM, Python)

A leading Canadian technology firm is seeking a Design Verification Engineer to join their team. This role involves verifying ASIC designs and collaborating with designers to integrate IP cores. Ideal candidates should hold a degree in Electrical or Computer Engineering / Science and have experience with verification methodologies and programming in Python and Perl. The position is full-time located in Canada, and offers the opportunity to work in a dynamic R&D environment.

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