Computer aided design Offres d'emploi - Markham, ON

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THE ROLE:

As a SoC Design Lead, Microarchitecture and Design Methodology, you will be responsible for developing micro-architecture specifications and refining execution methodologies for cutting-edge chip designs. You’ll collaborate with cross-functional teams, apply industry-standard tools and flows, and play a key role in driving project success across architecture, verification, and physical design. This role offers flexibility and visibility— In some way you get to choose what you want to do in terms of your role and visibility.

THE PERSON:

The ideal candidate will have a strong interest in Computer Architecture, Digital Logic Design and Verification, Design for Test, Synthesis, Static Timing Analysis, Power Verification and optimization, Physical Design aspects like Floorplan, Full chip timing, Place and Route and Utilization experiments. While we do understand that it is very difficult to have knowledge on expected areas, the candidate should have strong foundation in digital design to pick up the necessary concepts and should strive to continuously learn on the job. Excellent communication, organization and teamwork skills are paramount, as is the ability to identify and tackle different problems with diligence, whether it is a tool, flow or process issue, or any pre-silicon technical issue. You should be able strike a balance between collaborative problem-solving and independent solution development.

KEY RESPONSIBILITIES:

• Study both high-level and micro-architecture specifications and use Computer Architecture knowledge and background to gain an in depth understanding of new features or changes proposed in new projects.
• Automate (using scripting language) any execution flow that lacks efficiency or consumes more time to complete after discussing the overall picture and required data structure to make that happen.
• Study/Understand full chip floorplan and come up with Network on Chip by considering different factors stemming from behavioral design to physical design.
• Write comprehensive documents spelling out details of one work and train other while moving on to another task.
• Manage and monitor changes in the given tasks are project matures and be quick on the feet to re-align with new or different requirements.
• Research and document various pre silicon execution methods and thereby helping leads in assessing and coin new methodologies.

PREFERRED EXPERIENCE: :

• Strong understanding of Computer Architecture and Digital Design concepts.
• Strong background in STA, Clocks and Power optimization techniques.
• Experience with Verilog or SystemVerilog and UVM (preferred)
• Strong analytical skills and attention to detail
• Excellent written and verbal communication skills
• Ability to solve problems independently along with great teamwork skills

ACADEMIC CREDENTIALS:

• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or a related field is preferred.

ALTERNATE LOCATION:

• Boxborough, MA USA

#LI-BM1

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.

THE ROLE:

As a SoC Design Lead, Microarchitecture and Design Methodology, you will be responsible for developing micro-architecture specifications and refining execution methodologies for cutting-edge chip designs. You’ll collaborate with cross-functional teams, apply industry-standard tools and flows, and play a key role in driving project success across architecture, verification, and physical design. This role offers flexibility and visibility— In some way you get to choose what you want to do in terms of your role and visibility.

THE PERSON:

The ideal candidate will have a strong interest in Computer Architecture, Digital Logic Design and Verification, Design for Test, Synthesis, Static Timing Analysis, Power Verification and optimization, Physical Design aspects like Floorplan, Full chip timing, Place and Route and Utilization experiments. While we do understand that it is very difficult to have knowledge on expected areas, the candidate should have strong foundation in digital design to pick up the necessary concepts and should strive to continuously learn on the job. Excellent communication, organization and teamwork skills are paramount, as is the ability to identify and tackle different problems with diligence, whether it is a tool, flow or process issue, or any pre-silicon technical issue. You should be able strike a balance between collaborative problem-solving and independent solution development.

KEY RESPONSIBILITIES:

• Study both high-level and micro-architecture specifications and use Computer Architecture knowledge and background to gain an in depth understanding of new features or changes proposed in new projects.
• Automate (using scripting language) any execution flow that lacks efficiency or consumes more time to complete after discussing the overall picture and required data structure to make that happen.
• Study/Understand full chip floorplan and come up with Network on Chip by considering different factors stemming from behavioral design to physical design.
• Write comprehensive documents spelling out details of one work and train other while moving on to another task.
• Manage and monitor changes in the given tasks are project matures and be quick on the feet to re-align with new or different requirements.
• Research and document various pre silicon execution methods and thereby helping leads in assessing and coin new methodologies.

PREFERRED EXPERIENCE: :

• Strong understanding of Computer Architecture and Digital Design concepts.
• Strong background in STA, Clocks and Power optimization techniques.
• Experience with Verilog or SystemVerilog and UVM (preferred)
• Strong analytical skills and attention to detail
• Excellent written and verbal communication skills
• Ability to solve problems independently along with great teamwork skills

ACADEMIC CREDENTIALS:

• Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or a related field is preferred.

ALTERNATE LOCATION:

• Boxborough, MA USA

#LI-BM1

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.