ASIC Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE : We are seeking a design engineer to join our team and contribute to delivering high-quality, industry-leading technologies. You will focus on RTL design and coding for building blocks within our IP related to high-speed interfaces, configurable caches, virtual memory management, and power management logic. The IP is used across AMD mainstream products, so scalability and reusability are key considerations. Innovation to improve productivity and quality is central to this role. THE PERSON : You bring strong analytical and problem-solving skills with attention to detail. You collaborate effectively with cross-functional teams and communicate technical concepts clearly. You are committed to learning and contributing to team success. KEY RESPONSIBILITIES : Perform RTL design and coding according to feature requirement and architectural specification. Work closely with IP / SOC architects to generate design implementation documentation, for proper reviews and RTL delivery and signoff. Work closely with verification team to meet functionality, performance, coverage and quality standards. Analyze / fix Lint and CDC / RDC errors of the components. Develop and validate timing constraints involving multiple clock domains while working with physical design to harden IP Guarantee quality / timely deliverables meeting project’s schedule. Help to improve / automate design process. Support post-silicon product bring-up and debug. PREFERRED EXPERIENCE : RTL ASIC digital design using Verilog / System Verilog. Familiarity with industry-standard bus interface protocols like AXI. Debugging in digital environments. Power optimization of digital designs. Multi-clock domain designs. Design constraints for synthesis and timing analysis. Logic synthesis, timing closure, equivalence checking, and ECOs. Scripting languages (Perl, Tcl, Python). Ability to produce clear technical documentation and work collaboratively. ACADEMIC CREDENTIALS : Bachelor’s or master’s degree in electrical or computer engineering with 5 or more years of experience. #LI-DP1 Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.THE ROLE : We are seeking a design engineer to join our team and contribute to delivering high-quality, industry-leading technologies. You will focus on RTL design and coding for building blocks within our IP related to high-speed interfaces, configurable caches, virtual memory management, and power management logic. The IP is used across AMD mainstream products, so scalability and reusability are key considerations. Innovation to improve productivity and quality is central to this role. THE PERSON : You bring strong analytical and problem-solving skills with attention to detail. You collaborate effectively with cross-functional teams and communicate technical concepts clearly. You are committed to learning and contributing to team success. KEY RESPONSIBILITIES : Perform RTL design and coding according to feature requirement and architectural specification. Work closely with IP / SOC architects to generate design implementation documentation, for proper reviews and RTL delivery and signoff. Work closely with verification team to meet functionality, performance, coverage and quality standards. Analyze / fix Lint and CDC / RDC errors of the components. Develop and validate timing constraints involving multiple clock domains while working with physical design to harden IP Guarantee quality / timely deliverables meeting project’s schedule. Help to improve / automate design process. Support post-silicon product bring-up and debug. PREFERRED EXPERIENCE : RTL ASIC digital design using Verilog / System Verilog. Familiarity with industry-standard bus interface protocols like AXI. Debugging in digital environments. Power optimization of digital designs. Multi-clock domain designs. Design constraints for synthesis and timing analysis. Logic synthesis, timing closure, equivalence checking, and ECOs. Scripting languages (Perl, Tcl, Python). Ability to produce clear technical documentation and work collaboratively. ACADEMIC CREDENTIALS : Bachelor’s or master’s degree in electrical or computer engineering with 5 or more years of experience. #LI-DP1

Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.